VLIW/EPIC/Merced (was RE: Beowulf And Digital Signal Processing - Success!)

Bohn, Christopher A. cbohn@afit.af.mil
Wed, 30 Sep 1998 12:03:02 -0400


On 9/30/98 11:28 AM, kragen@pobox.com [SMTP:kragen@pobox.com] wrote:

> Does anyone know what the relationship between VLIW and Merced's EPIC
> is?  Good EPIC support in gcc will be absolutely essential for Beowulfs
> in 2001.

According to Dowd & Severance, "High Performance Computing, 2d ed", 407-413,
the IA-64 instruction word is 128 bits long.  The first 8 "template" bits
indicate whether one, two, or all three of the instructions in the
instruction word are independent.  The three instructions do not have to be
independent to be bundled

Each of the three 40-bit instructions (8+3x40=128) breaks out into 
- 13-bit opcode 
- 6-bit predicate 
- three 7-bit operands 

She's also expected to be a memory-bandwidth hog, particularly because of
the predicated instructions and speculative loads, but, "increased bandwidth
could be a fair trade for the potential benefits that these instructions can
provide."

To see a block-level diagram of Merced, goto 
http://www.eetimes.com/news/98/1029news/internal.html

Take care,
cb 
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Capt Christopher A. Bohn 
Graduate Student, Electrical (digital) Engineering 
Air Force Institute of Technology     Phone (937)255-3636 (DSN 785) 
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