[eepro100] Performance improvement.

[Robbie Dinn]

Hi

Regarding interrupts and packet through put.
One of the engineers at the firm I work at discovered that
you can get better through put an Intel architecture linux box
with multiple 82559 NIC's if you arrange that the NIC's
share an interrupt line with each other.

This seemed a bit counter intuitive to me.

Can anyone else confirm this?

The particular setup we had was a machine with two NIC's
acting as a bridge, transferring packets from the first NIC
to the second NIC and vice versa.

With separate interrupt lines for each NIC, we got different
through put depending on which direction
we were sending the (one way) traffic through the
bridge i.e. there was an asymmetry.

With the two NIC's sharing one interrupt the through put
was the same for each direction i.e. symetrical.

Here is what I think may be happening.

The interrupt lines have different priorities. I think the
order goes something like
highest 0, 1, (2 missing), 8, 9, 10, 11, 12, 13, 14, 15, 3, 4, 5, 6, 7 lowest

Some how the interrupt priorities causes one card get it's interrupts
to be serviced more quickly, while the other card drops packets?

Does this make sense?

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From:  Ofer Fryman
Sent:  11 April 2001 10:41
To:  Robbie Dinn; dori'
Cc:  eepro100@scyld.com
Subject:  RE: [eepro100] Performance improvement.


Hello Dori,

I got some response from people that Intel does not use GNU license for
their driver, so after looking at the license, which is scary, I left this
issue erased all code that is relevant to it, I really do not want to get in
trouble with Intel simply for trying to improve their products. I am now
looking for another chip that as an open source driver with interrupt
mitigation support.

Any way after improving only the eepro100 I got 400Mbit throughput (in and
out, 800Mbit passes through the driver and the card) with large packets
(1518Bytes), off course I use 66/64 PCI bus, my trouble remained with short
packets due to no interrupt mitigation, I will be happy to share my eepro100
code, since there is no restrictions on it.

If you can help me get Intel's permission to work on their driver, and also
get some specs on the interrupt mitigation I will be glad to go back to
improve this driver.

Ofer

-----Original Message-----
From: Eldar, Dori [mailto:dori.eldar@intel.com]
Sent: Tuesday, April 10, 2001 10:02 PM
To: 'ofer@shunra.co.il'
Subject: Re: [eepro100] Performance improvement.




I combined eepro100 and e100 drivers, I now get throughput of 84K short
packets, still it is bad, is there any one out there who need performance 
improvement that can help improve the driver more?, I will be glad to share
the new code with everybody.

Well I'm interested to see your code, can you send it to me or post it some
where ?

Thanks Dori

_______________________________________________



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robbie@microbus.co.uk