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<p>I'm curious about your next gen plans, given Phi's roadmap.<br>
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<div class="moz-cite-prefix">On 6/13/18 9:17 PM, Stu Midgley wrote:<br>
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<div dir="ltr">low level HPC means... lots of things. BUT we are
a huge Xeon Phi shop and need low-level programmers ie. avx512,
careful cache/memory management (NOT openmp/compiler
vectorisation etc).</div>
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I played around with avx512 in my rzf code.
<a class="moz-txt-link-freetext" href="https://github.com/joelandman/rzf/blob/master/avx2/rzf_avx512.c">https://github.com/joelandman/rzf/blob/master/avx2/rzf_avx512.c</a> .
Never really spent a great deal of time on it, other than noting
that using avx512 seemed to downclock the core a bit on Skylake. <br>
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Which dev/toolchain are you using for Phi? I set up the MPSS bit
for a customer, and it was pretty bad (2.6.32 kernel, etc.). Flaky
control plane, and a painful host->coprocessor interface. Did
you develop your own? Definitely curious.<br>
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<div dir="ltr">On Thu, Jun 14, 2018 at 1:08 AM Jonathan Engwall
<<a href="mailto:engwalljonathanthereal@gmail.com"
moz-do-not-send="true">engwalljonathanthereal@gmail.com</a>>
wrote:<br>
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<p dir="ltr">John Hearne wrote:<br>
> Stuart Midgley works for DUG? They are currently<br>
> recruiting for an HPC manager in London...
Interesting...</p>
<p dir="ltr">Recruitment at DUG wants to call me about Low
Level HPC. I have at least until 6pm.<br>
I am excited but also terrified. My background is C and now
JavaScript, mostly online course work and telnet MUDs.<br>
Any suggestions are very much needed.<br>
What must a "low level HPC" know on day 1???<br>
Jonathan Engwall<br>
<a href="mailto:engwalljonathanthereal@gmail.com"
target="_blank" moz-do-not-send="true">engwalljonathanthereal@gmail.com</a></p>
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-- <br>
<div dir="ltr" class="gmail_signature"
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<div dir="ltr">Dr Stuart Midgley<br>
<a href="mailto:sdm900@gmail.com" target="_blank"
moz-do-not-send="true">sdm900@gmail.com</a></div>
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<pre class="moz-signature" cols="72">--
Joe Landman
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t: @hpcjoe
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