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        align="left"><!--[endif]--><span style="mso-ansi-language:EN-US"
        lang="EN-US">1st International Workshop on
        Exploiting Silicon Photonics for <o:p></o:p></span></p>
    <p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:
11.0pt;font-family:&quot;Calibri&quot;,&quot;sans-serif&quot;;mso-fareast-font-family:Calibri;
        mso-ansi-language:EN-US;mso-fareast-language:EN-US" lang="EN-US">energy-efficient
heterogeneous
        parallel architectures (SiPhotonics'2014) <u><span
            style="color:#548DD4"><a
              href="http://www.hipeac.net/conference/vienna/workshop/siphotonics/2014"><span
                style="color:#548DD4">http://www.hipeac.net/conference/vienna/workshop/siphotonics/2014</span></a></span></u><o:p></o:p></span></p>
    <p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:
11.0pt;font-family:&quot;Calibri&quot;,&quot;sans-serif&quot;;mso-fareast-font-family:Calibri;
        mso-ansi-language:EN-US;mso-fareast-language:EN-US" lang="EN-US">in
        Vienna, Austria, 21 January
        2014<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">associated
        with the
        9th HiPEAC conference on High Performance and Embedded
        Architecture and
        Compilers (<u><span style="color:#548DD4"><a
              href="http://www.hipeac.net/conference/vienna"><span
                style="color:#548DD4">http://www.hipeac.net/conference/vienna</span></a></span></u>).<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">*****************************************************************************<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><b style="mso-bidi-font-weight:normal"><span
          style="mso-ansi-language:EN-US" lang="EN-US">Goal of the
          Workshop:<o:p></o:p></span></b></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">The
        main purpose of
        this workshop is to promote further research interests and
        activities on Silicon
        Photonics and related topics in the perspective of its adoption
        in future
        computer systems. In fact Silicon Photonics poses in itself
        crucial challenges
        and interesting design tradeoffs for being deployed in future
        computer systems
        effectively, also in integration with other technologies.
        Furthermore, the
        unique features of photonics (e.g. extreme low-latency,
        end-to-end
        transmission, high bandwidth density) have the potential to
        constitute a <i style="mso-bidi-font-style:normal">discontinuity
        </i>element able to modify the
        expected <i style="mso-bidi-font-style:normal">shape</i> of
        future computer
        systems from the design point of view and also from the
        programmability and/or
        runtime management perspectives. <o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">Summarizing,
        silicon
        photonics can bring innovations and benefits into current and
        foreseeable
        computing systems <i style="mso-bidi-font-style:normal">directly</i>,
        due to
        their intrinsic features, but also <i
          style="mso-bidi-font-style:normal">indirectly</i>
        enabling the evolution towards architectures, runtime and
        resource management
        approaches that maximize the photonic raw technological<span
          style="mso-spacerun:yes">  </span>opportunities and lead to
        more efficient
        overall designs, otherwise impossible.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">This
        workshop aims to
        increase the synergy from a complete range of perspectives, from
        raw technology
        issues and solutions up to studies at the overall system level
        of modern
        multi-/many-core systems, both from academic and industrial
        researchers working
        in this area. We are interested in experimental,
        systems-related, and
        work-in-progress papers in all aspects of the Silicon Photonics
        technology at
        all levels of development.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><b style="mso-bidi-font-weight:normal"><span
          style="mso-ansi-language:EN-US" lang="EN-US">Topics of
          interest:<o:p></o:p></span></b></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">The
        topics of interest
        include, but are not limited to:<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Integration of
        positive features of both electronic and photonic
        interconnection technology.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Low-level
        technological improvements and implications (e.g. integrated
        lasers, modulation
        and detection technologies, microring resonators).<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Fabrication issues
        (e.g. precision) and new tools (e.g. design, place and route,
        ecc) to easy the
        topological exploration.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Emerging challenges
        and solutions for on-chip interconnections, cache coherence
        protocols, runtime and
        OS scheduling, and programmability, for future
        homogeneous/heterogeneous energy-aware
        CMPs<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Simulation,
        validation and verification<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Photonics in the
        memory hierarchy and I/O of computing systems<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">- QoS
        management and
        performance analysis<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Programming
        languages and compilers for thermal-, energy-, and power-aware
        architectures<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Solving the
        requirements of multiple heterogeneous parallel applications.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Interaction between
        photonic features and current computer design issues.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">-
        Industrial practices
        and case studies<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><b style="mso-bidi-font-weight:normal"><span
          style="mso-ansi-language:EN-US" lang="EN-US">Submission
          guidelines:<o:p></o:p></span></b></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">Prospective
        authors
        should submit electronically a full paper in English in PDF
        format. Submitted
        papers must represent original unpublished research that is not
        currently under
        review for any other conference or journal.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">All
        manuscripts will
        be reviewed and will be judged on correctness, originality,
        technical strength,
        significance, quality of presentation, and interest and
        relevance to the workshop
        attendees. <o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">They
        should be
        formatted according to </span><span
        style="mso-bidi-font-family:
        Arial;color:black;mso-ansi-language:EN-US" lang="EN-US">double-column
        ACM format pages,
        including figures and references. Please use the following
        template when
        preparing your manuscript: </span><a
        href="http://www.acm.org/sigs/publications/proceedings-templates"><span
style="mso-bidi-font-family:Arial;color:#000099;mso-ansi-language:
          EN-US" lang="EN-US">http://www.acm.org/sigs/publications/proceedings-templates</span></a><span
        style="mso-ansi-language:EN-US" lang="EN-US">,not exceeding 6
        pages.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">Submissions
        can be
        made through the submission web site at<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><a
          href="https://www.easychair.org/conferences/?conf=siphotonics2014">https://www.easychair.org/conferences/?conf=siphotonics2014</a><o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><b style="mso-bidi-font-weight:normal"><span
          style="mso-ansi-language:EN-US" lang="EN-US">Publication:<o:p></o:p></span></b></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal;mso-layout-grid-align:none;text-autospace:none"><span
        style="mso-ansi-language:EN-US" lang="EN-US">Informal
        proceedings will be provided in an USB
        stick to all participants including all material relevant to the
        conference and
        the related events.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">To
        confirm the
        publication, at least one author of each accepted paper is
        expected to register
        for the workshop and present the papers at the workshop itself.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US">After
        the conference,
        authors of selected papers will be invited to submit an extended
        version of
        their contribution for a special issue of the journal
        "Concurrency and Computation:
        Practice and Experience" from Wiley, scheduled to be published
        for June
        2014.<o:p></o:p></span></p>
    <p class="MsoNormal"
      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
      normal"><span style="mso-ansi-language:EN-US" lang="EN-US"><o:p> </o:p></span></p>
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        submission
        deadline: October 24, 2013<o:p></o:p></span></p>
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        of
        acceptance: November 30, 2013<o:p></o:p></span></p>
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        paper
        due: December 13, 2013<o:p></o:p></span></p>
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        21st Jan
        2014<o:p></o:p></span></p>
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      style="margin-bottom:0cm;margin-bottom:.0001pt;line-height:
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        García,
        University of Murcia, Spain.<o:p></o:p></span></p>
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        Bartolini, University
        of Siena, Italy<o:p></o:p></span></p>
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          style="mso-tab-count:2">                            </span>Columbia
        University<o:p></o:p></span></p>
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        Calo'<span style="mso-tab-count:3">                            
        </span>Politecnico di Bari<o:p></o:p></span></p>
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          style="mso-tab-count:1">   </span><span
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        University
        of Murcia<o:p></o:p></span></p>
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        EN-US" lang="EN-US">University of </span>Murcia</p>
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        of Siena<o:p></o:p></span></p>
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        Institute
        of Technology (KIT)<o:p></o:p></span></p>
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          style="mso-tab-count:
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        </span>Northwestern
        University<o:p></o:p></span></p>
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          style="mso-tab-count:1">     </span><span
          style="mso-tab-count:2">                            </span>Norwegian
        University
        of Science and Technology<o:p></o:p></span></p>
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          style="mso-tab-count:1">             </span><span
          style="mso-tab-count:1">              </span>Colorado State
        University<o:p></o:p></span></p>
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        style="mso-tab-count:
        1">              </span>University of Ferrara</p>
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          3">                                           </span>IBM TJ
        Watson<o:p></o:p></span></p>
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      normal">email: j<span style="mso-ansi-language:EN-US" lang="EN-US">mgarcia[at]ditec.um.es<o:p></o:p></span></p>
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        +34 868 884819<span style="mso-spacerun:yes">  </span><span
          style="mso-spacerun:yes"> </span><span
          style="mso-spacerun:yes">  </span>Fax: +34 868 884151<o:p></o:p></span></p>
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    <p class="MsoNormal"
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    <p class="MsoNormal"
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      Matematiche</p>
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        of Siena,
        Italy <o:p></o:p></span></p>
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        +39 0577 234850<span style="mso-tab-count:1">    </span>Fax:
        +39 0577 233609<o:p></o:p></span></p>
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    <pre class="moz-signature" cols="72">-- 
-----------------------------
Prof. Jose Manuel Garcia Carrasco
Departamento de Ingenieria y Tecnologia de Computadores
Facultad de Informatica. Universidad de Murcia
Campus de Espinardo - 30080 Murcia (SPAIN)
Tel.: +34-868-884819    Fax: +34-868-884151
email: <a class="moz-txt-link-abbreviated" href="mailto:jmgarcia@ditec.um.es">jmgarcia@ditec.um.es</a>  |  <a class="moz-txt-link-abbreviated" href="mailto:jm.garcia@ieee.org">jm.garcia@ieee.org</a>
url: <a class="moz-txt-link-freetext" href="http://webs.um.es/jmgarcia">http://webs.um.es/jmgarcia</a></pre>
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