# [Beowulf] Parallella Epiphany performance

Eugen Leitl eugen at leitl.org
Fri May 23 06:32:23 PDT 2014

```After I've finally gotten my Kickstart backer board and set it
up to boot (you will need the included heatsink on the Zynq 7020
as well as a small fan) I've ran a few included benchmarks.

In no particular order of relevance:

linaro-nano:~/Parallella/epiphany-examples/mesh_bandwidth_all2one> ./run.sh
0x0000417e!
The bandwidth of all-to-one is 4193.00MB/s!

linaro-nano:~/Parallella/epiphany-examples/mesh_bandwidth_bisection> ./run.sh
0x00000f46!
The bandwidth of bisection is 9590.00MB/s!

linaro-nano:~/Parallella/epiphany-examples/basic_math> ./run.sh

The clock cycle count for addition is 5.

The clock cycle count for subtraction is 5.

The clock cycle count for multiplication is 6.

The clock cycle count for division is 47.

The clock cycle count for "fmodf()" is 66635.

The clock cycle count for "sinf()" is 23930.

The clock cycle count for "cosf()" is 51115.

The clock cycle count for "sqrtf()" is 93785.

The clock cycle count for "ceilf()" is 18475.

The clock cycle count for "floorf()" is 17690.

The clock cycle count for "log10f()" is 10735.

The clock cycle count for "logf()" is 9976.

The clock cycle count for "powf()" is 348243.

The clock cycle count for "ldexpf()" is 36306.

linaro-nano:~/Parallella/epiphany-examples/matmul-16> ./run.sh

Matrix: C[512][512] = A[512][512] * B[512][512]

Using 4 x 4 cores

Seed = 0.000000
Loading program on Epiphany chip...
Writing C[1048576B] to address 00200000...
Writing A[1048576B] to address 00000000...
Writing B[1048576B] to address 00100000...
GO Epiphany! ...   Writing the GO!...
Done...
Finished calculating Epiphany result.
Reading result from address 00200000...
Calculating result on Host ...   Finished calculating Host result.
Reading time from address 00300008...

*** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** ***
Verifying result correctness ...   C_epiphany == C_host
*** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** ***

Epiphany -  time:     153.0 msec  (@ 600 MHz)
Host     -  time:    1867.2 msec  (@ 667 MHz)

* * *   EPIPHANY FTW !!!   * * *

I can run the rest of the examples and post numbers if there's
interest:

naro-nano:~/Parallella/epiphany-examples> ls -la
total 152
drwxrwxr-x 36 linaro linaro 4096 May 22 15:46 ./
drwxrwxr-x  5 linaro linaro 4096 Mar  7 12:09 ../
drwxrwxr-x  8 linaro linaro 4096 Mar  6 23:47 .git/
-rw-rw-r--  1 linaro linaro  227 Mar  6 23:42 .gitignore
-rw-rw-r--  1 linaro linaro 1464 Mar  6 23:42 README.md
drwxrwxr-x  4 linaro linaro 4096 May 17 11:47 assembly/
drwxrwxr-x  4 linaro linaro 4096 Mar  6 23:44 basic_math/
drwxrwxr-x  4 linaro linaro 4096 Mar  6 23:47 clockgating_mode/
drwxrwxr-x  4 linaro linaro 4096 May 17 11:48 ctimer/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 dma_2d/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 dma_chain/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 dma_interrupt/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 dma_message_read/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 dma_message_write/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 dma_slave/
drwxrwxr-x  4 linaro linaro 4096 May 22 15:48 e-dump-mem/
drwxrwxr-x  4 linaro linaro 4096 May 22 15:46 e-dump-regs/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 e-mem-sync/
drwxrwxr-x  4 linaro linaro 4096 Mar  6 23:43 e-toggle-led/
drwxrwxr-x  4 linaro linaro 4096 May 22 12:48 emesh_read_latency/
drwxrwxr-x  4 linaro linaro 4096 May 22 12:48 emesh_traffic/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 erm/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 erm_example/
drwxrwxr-x  4 linaro linaro 4096 Mar  6 23:42 fft2d/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 hardware_barrier/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 hardware_loops/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 hello_parallella/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 interrupts/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 link_lowpower_mode/
drwxrwxr-x  4 linaro linaro 4096 Mar  7 02:04 matmul-16/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 mem_protect/
drwxrwxr-x  4 linaro linaro 4096 May 23 13:26 mesh_bandwidth_all2one/
drwxrwxr-x  4 linaro linaro 4096 May 22 12:42 mesh_bandwidth_bisection/
drwxrwxr-x  4 linaro linaro 4096 May 22 12:41 mesh_bandwidth_neighbour/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 mutex/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 nested_interrupts/
drwxrwxr-x  3 linaro linaro 4096 Mar  6 23:42 register_test/
drwxrwxr-x  4 linaro linaro 4096 May 22 12:07 remote_call/

```

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