bill at cse.ucdavis.edu
Tue Apr 29 23:25:51 PDT 2014
Sounds like a potentially interesting CPU/platform for HPC. Of
1) similar quad socket performance to intel's best
2) embracing 3rd parties access to cc memory
3) up to 8 off chip memory controllers with cache (centaur chip)
4) allowing 3rd party motherboards
5) IBM exploring getting out of fab business
6) IBM apparently open to license various aspects of the power 8
7) substantially better off chip memory bandwidth "230GB/sec sustained"
* is the interconnect cache coherent?
* does a chip <-> chip interconnect come at the cost of one of the
memory channels/centaur chips?
* latency of interconnect?
* will 3rd parties like nvidia be able to do something compelling with
cache coherent access to main memory?
* will 3rd parties be able to replace the dram <-> centaur chip
with something that provides more performance? Seems like one of the
dram fabs could tune the bandwidth/latency/power, ddr3/4/5/gddr
chips, and number of outstanding memory transactions. Much like
current SSDs and GPUs do.
* How much will a barebones dual socket OpenPower system cost?
* Can OpenPower push Intel on performance per $ or performance per watt
* Is tunneling CAPI over PCI-e sane?
* Will anyone smaller Google, Facebook, and Amazon be able to buy
get good pricing?
Information I've found so far:
For a S824 power8 @ 3.5 GHz, 4 chips, 6 cores/chip, 8 threads/core:
Interesting "48-way drawer" with 2-hop interconnect, page 24. Each chip
has 3 38.4 GB/sec links and 3 12.8GB/sec links to neighbors:
More information about the Beowulf