[Beowulf] more news from Parallella/Epiphany

Eugen Leitl eugen at leitl.org
Fri Feb 15 02:21:56 PST 2013


On Fri, Feb 15, 2013 at 11:07:39AM +0100, Eugen Leitl wrote:
> 
> http://www.adapteva.com/white-papers/building-the-worlds-first-parallella-beowulf-cluster/
> 
> It would be indeed interesting to see whether the onboard Zynq
> could be used to implement an MPI Interface instead of going
> through Ethernet.
> 
> http://www.adapteva.com/white-papers/parallella-64-cores/

With 48 pins that's 8 pins for 6 links, and ~GByte/s
thoughput. As the system is credit-card sized the
cable geometry would be very short for nearest-neighbor
(3d torus) connectivity. 

http://forums.parallella.org/viewtopic.php?f=10&t=159

Re: Zynq 7020
by aolofsson » Thu Feb 14, 2013 8:43 pm

Roman will be publishing a guide explaining how to replace the bit stream of the default Parallella Ubuntu 12.04 SD image distribution with a custom bit stream. It is quite straightforward.(as long as the content of the FPGA bitstream is valid..)


http://www.parallella.org/2013/02/10/a-first-look-at-the-parallella-board/

ZYNQ: Thanks to a very generous offer from Xilinx we will be using the Zynq-7020 device (instead of the Zynq-7010) on Parallella boards delivered to Kickstarter backers. For backers interested in using the programmable logic of the Zynq, this is a significant upgrade! We hope everyone is feeling good about the Parallella $99 price. It’s a ridiculous bargain at this point.:-) Going forward, the basic Parallella board will include the Zynq-7010 but there will be higher performance boards available with the Zynq-7020 as well.

EXPANSION  IO: After seeing some of the exciting potential uses cases for the Parallella board we understood that we needed to be much more aggressive in our IO design. After a lot of back and forth, we finally converged on a solution that includes four 60-pin Samtek connectors placed at the bottom side of the board (PEC_* above). In aggregate, these connectors bring out 48 FPGA logic pins, two complete link ports from the Epiphany chip, several power supply connections and have a max bandwidth of more than 8 GB/sec! These symmetrically placed low stack height connectors will enable development of a wide array of exciting daughter cards going forward.

CONNECTORS: We placed the standard connectors on opposite sides of the cards to allow easy access when sitting in a rack or closed box. To fit all the connectors on two edges, we had to minimize the size of the standard connectors.
FORM-FACTOR: We have stayed within the credit card sized form factor, but due to placement constraints we have not been able to keep the corners rounded. This means that you won’t be able to place the Parallella board within an Altoid tin can.

MOUNTING HOLES: Four mounting holes have been added to allow easy mounting and system integration.


More information about the Beowulf mailing list