[Beowulf] Teraflop chip hints at the future
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Lawrence Stewart larry.stewart at sicortex.comMon Feb 12 21:13:07 PST 2007
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On Feb 12, 2007, at 10:22 PM, Chris Samuel wrote: > On Tue, 13 Feb 2007, Mitchell Wisidagamage wrote: > >> I think this news is of some relevance to the group... >> >> http://news.bbc.co.uk/1/hi/technology/6354225.stm > > Single or double precision ? > > -- http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=197004697 eetimes has a better article, that says it is single precision. each core is cited as being 3 mm**2 in 65 nm. The mips-64 cores we're using in 90 nm are 6 mm**2, with a double precision FP unit. So by area, the Intel cores are similar in complexity Intel is stacking dram dice above the cpu as an L4 cache, but the article doesn't really explain how they plan to expand the off-chip bw other than by going to photonics eventually. -Larry
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