[Beowulf] Teraflop chip hints at the future
larry.stewart at sicortex.com
Mon Feb 12 21:13:07 PST 2007
On Feb 12, 2007, at 10:22 PM, Chris Samuel wrote:
> On Tue, 13 Feb 2007, Mitchell Wisidagamage wrote:
>> I think this news is of some relevance to the group...
> Single or double precision ?
eetimes has a better article, that says it is single precision. each
cited as being 3 mm**2 in 65 nm. The mips-64 cores we're using in
are 6 mm**2, with a double precision FP unit. So by area, the Intel
are similar in complexity
Intel is stacking dram dice above the cpu as an L4 cache, but the
article doesn't really
explain how they plan to expand the off-chip bw other than by going
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