[Beowulf] AMD’s Direct Connect Architecture

[Benjamin W. Mayer]

>From http://forums.amd.com/index.php?showtopic=14989

Direct Connect Architecture
-Addresses and helps reduce the real challenges and bottlenecks of system
architectures
-Memory is connected directly to the CPU thereby increasing memory latency
performance
-I/O is directly connected to the CPU for more balanced throughput and I/O
-CPUs are connected directly to CPUs allowing for more linear symmetrical
multiprocessing

There are several things that help the SMP performance.
The first is having memory directly attached to the CPU (multiple
memory controls are possible). This mean that the CPUs do not have to
share memory bandwidth with each other. It also means that memory
bandwidth and total amount of memory scales with the number of processors
(VERY good).

Also the Hyper Transport connections between the CPUs allows for the
bandwidth between CPUs in an SMP to scale with the number of processors.
>From what I have seen this only* goes to 8-way machines, but that is
still pretty good.

*Cray is building a machine based on 8-way Opteron nodes called Red Storm.
They then use a special Cray interconnect to connect the 8-way Opteron
nodes into a larger computer.

Ben Mayer
----------------
University of Minnesota
PhD Student


On Fri, 25 Jun 2004, Doug Shubert wrote:

> Hello All,
> Any thoughts on AMD’s 'Direct Connect Architecture' support?
> Will 'Direct Connect' benefit SMP node performance?
> Doug
>
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