[Beowulf] EM64T Clusters
bill at cse.ucdavis.edu
Mon Jul 19 13:00:48 PDT 2004
On Fri, Jul 16, 2004 at 04:34:04PM -0400, Mark Hahn wrote:
> have a x16 PCI-e slot, which afaikt, would be a perfect place to put
> a low-latency cluster interconnect board. I haven't heard Quadrics
> or Myri talking about their roadmap for PCI-e, but IB people seem to
> think it'll give them the throne. hard to see why, since it'll
> help their competitors as well. come to think of it, if IB people
> claim PCI-e will shave over 1 us off their latency, what will PCI-e
> do for Quadrics (already under 2 us!)?
Myrinet at least for the current generation doesn't require more bandwidth
than PCI-x can give. IB cards typically have 2 20 Gbit ports (10 Gbit each
direction). So x8 or x16 slots make a much bigger difference with IB.
I suspect most if not everyone in the interconnect market has plans
for pci-e bandwidth.
Computational Science and Engineering
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