FYI: superlinear speedups in GROMACS (fwd)

[Dominic Wu]

Sure, and I do believe there are commodity chips with larger L2 caches, too.
Which means some CPU's could perform better in a dual setup whereas other
CPU's will perform better in a single setup.  The plot thickens. :)

-----Original Message-----
From: Eugene Leitl [mailto:Eugene.Leitl at lrz.uni-muenchen.de]
Sent: Friday, March 08, 2002 1:30 PM
To: Dominic Wu
Cc: Beowulf at beowulf.org
Subject: RE: FYI: superlinear speedups in GROMACS (fwd)


On Fri, 8 Mar 2002, Dominic Wu wrote:

> Would not a single CPU with a larger L2 cache solve the problem better
then?

Caches are very expensive due to chip yield reasons (bad die yield goes up
exponentially with die size). In fact, it would make sense to drop cache
from dies, and go for embedded memory instead, which also removes lots of
other overhead, such as branch prediction and pipelining, plus allows to
go to very broad on-die buses and hence naturally foster VLIW and SIMD.

However, as COTS consumers we're bound to what the market gives us.
Hopefully, Blue Gene architectures and embedded memory in general will
find its way into mainstream PCs and hence clusters.