>2 p4 processor systems (Robert G. Brown)
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Mark Hahn hahn at physics.mcmaster.caWed Aug 28 16:15:56 PDT 2002
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> If the machines that you are talking about really are 6-Way SMP nodes, > what are they? afaikt, these are machines based on the serverworks HE chipset. serverworks has a very sparse/messy/wrong website, but on http://www.serverworks.com/products/matrix.html they claim to support 6 PIII's. they also claim to provide 4.1 GB/s, but I think that's merely a marketroid's dream: I'm guessing all 6 CPUs are on 1 or two FSB100 or 133 bus(es), and therefore you're only ever going to see about 1 GB/s. 6 is such an odd number (pardon) - I wonder if it's the Intel (Corrolary) Profusion chipset, which actually goes up to 8 PIII's. again, the CPUs are going to be crammed onto a pitifully slow shared FSB, and performance is going to hurt. HP apparently made boxes with both approaches. the NetServer LH6000 seems to have been the wacky SW-HE chipset. it's DEFINITELY not 1U, though, or even close. in short, these big-way PIII SMP machines seem to be based on the premise that your application will fit entirely in the large private caches that PIII/xeons had, and that your main performance criterion is to stick lots of nics in lots of separate PCI buses with lots of disks. in short, the CPU doesn't do much except route DMAs, and you're willing to pay big for an impressive box. pretty much the antithesis of beowulf, I'd say ;)
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