very high bandwidth, low latency manner?

[Steffen Persvold]

On Thu, 11 Apr 2002, Iwao Makino wrote:

> I think ... Quadrics<http://www.quadrics.com/> is another one.
>
Yep, sorry I forgot that one.

> Here's quick figures I have on hand....
>
> RH7.2, 2.4.9 kernel for i860 cluster.
> On their site, they claim;
> after protocol, of 340Mbytes/second in each direction. The
> process-to-process latency for remote write operations is2us, and 5us for
> MPI messages.
>
But this 340MBytes/second and 2us latency is also chipset dependent, as I
mentioned for SCI (in my examples latency was lowest on 760MPX but
bandwidth was highest on IA64 460GX...). I can't imagine that the i860 can
actually perform as well as 340MByte/sec since the Hub-Link (between
the MCH and the P64H) has a limit of 266MByte/sec (AFAIK) ....

> But pricing is MUCH higher than SCI/Myrinet.
>

Certainly.


> Best regards,
>
> At 4:08 +0200 5.04.2002, Steffen Persvold wrote:
> >On Thu, 4 Apr 2002, Jim Lux wrote:
> >
> >>  What's high bandwidth?
> >>  What's low latency?
> >  > How much money do you want to spend?
> >I don't want to start a flamewar here, but I _think_ (not knowing real
> >numbers for other high speed interconnects) that SCI has atleast the
> >lowest latency and maybe also the highest point to point bandwidth :
> >
> >SCI application to application latency   : 2.5 us
> >SCI application to application bandwidth : 325 MByte/sec
> >
> >Note that these numbers are very chipset specific (as most high speed
> >interconnect numbers are), these numbers are from IA64. Here are numbers
> >from a popular IA32 platform, the AMD 760MPX :
> >
> >SCI application to application latency   : 1.8 us
> >SCI application to application bandwidth : 283 MByte/sec
>
>

Regards,
-- 
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