My jaw has hit the floor...

Greg Lindahl lindahl at
Mon Feb 19 23:26:43 PST 2001

On Thu, Feb 15, 2001 at 01:19:23PM -0500, Tom Morris wrote:

> Actually our initial implementations are 1 Gb/s per pin (500 MHz DDR)
> and 8 bits wide in each direction.  I usually call that 1 GB/s, but if you
> count the way the RapidIO and Infiniband folks do, it would be 2 GB/s.

I was just repeating what the article said. I didn't know your chipset
was out of non-disclosure. It's still too slow to put a memory system
on it, and your chipset, of course, doesn't do that.

-- g

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