A beowulf for parallel instruction.

[J, A. Llewellyn]

We are planning to provide a vehicle for instruction in
parallel computing. Given this rather vague objective,
what influence might this have on the selection of
hardware and software? The selection of non-bleeding
edge components is one obvious issue but there must be
others.  Although this is slightly off-topic I'd
greatly appreciate comments from those who are running
machines that may cater to this area as part of their
workloads.