Athlon goes DDR

[Robert G. Brown]

On Mon, 30 Oct 2000, Eugene Leitl wrote:

> --AMD introduces AMD-760? chipset, enabling the world's first
> commercially available PC platform supporting next-generation Double
> Date Rate (DDR) memory technology--

Interesting.  I wonder why the memory sellers don't extend the same
special "double date rates" to the previous generation -- sounds like
some sort of bias agains senior citizens to me...;-)

Seriously, this looks very promising.  According to my benchmarks, there
is a class of code (mostly big-memory vector arithmetic operations) that
will just about double if they do indeed succeed in doubling memory
bandwidth.  However, they didn't mention (or if they did I didn't see
it) the effect on memory latency.  Are we to presume that DDR won't
affect memory latency relative to SDRAM?  I would guess that if it
significantly improved it they would have said something...

Also, as always, folks should be aware (before they rush right out and
buy 128 spanking new nodes based on the technology) that on a LOT of
code mixes "cache works".  Like mine.  What this means is that one's
numerical performance is much more strongly tied to the CPU's rates when
operating on data in L1 or possibly L2, and my measurements show AMD
CPU's to very slightly underperform relative clock compared to Intel for
these code mixes, pretty much independent of memory speed.  The BEST
thing to do is find such a box and try it with your code (which I plan
to do as soon as possible).

The other area where it might be promising is in dual systems -- this is
a place where memory bottlenecking is glaringly visible and although it
will continue to be visible for streaming I/O until memory bus speed
matches speed to/from L1, improvement here would be most welcome.

   rgb

-- 
Robert G. Brown	                       http://www.phy.duke.edu/~rgb/
Duke University Dept. of Physics, Box 90305
Durham, N.C. 27708-0305
Phone: 1-919-660-2567  Fax: 919-660-2525     email:rgb at phy.duke.edu